Hardware functional verification systems (“emulators” or “emulation systems”) utilize arrays of processing devices or programmable logic devices, and are used to verify circuit designs. A common method of design verification is to use hardware emulators to emulate the circuit design prior to physically manufacturing the integrated circuit of the hardware. Processor-based emulators sequentially evaluate combinatorial logic levels in the design under verification, starting at the inputs and proceeding to the outputs. Hardware emulators, both processor-based and programmable logic device-based, allow engineers and hardware designers to test and verify the operation of an integrated circuit, an entire board of integrated circuits, or an entire system without having to first physically fabricate and manufacture the electronic hardware.
Debugging a logic design is the search for and correction of errors in the design. To improve debugging of the user's circuit design, full visibility into the circuit design being verified is desired. Full visibility means that the user of the emulator can get waveform data for all signals in their design, regardless of where in the circuit that signal is found. Such full visibility can require the emulator to handle huge amounts of waveform data, also known as probe data. For example, if a user design contains ten million gates, the waveform for one million cycles would include ten trillion bits, using the assumption that each signal requires a single bit in each cycle. This data will need to be moved from the emulator to the user's workstation in order to generate a waveform for the user.